日本語
Hi There,
We are designing a pass through PCB by routing the isolated RJ45 signals. Please refer the below image for reference.
? ? How to achieve differential trace impedance for isolated RJ45 signals in PCB? Even if it is 4layer since there should not be any ground/power plane under the differential pairs after magnetics.
? ? Can we give shield ground of RJ45 connector as reference plane for these differential traces to achieve 100ohm impedance for differential traces on the PCB? If so how can we achieve the 2KV isolation between differential pair and shield ground ?
? ? How can we achieve the differential impedance without reference plane and by using only trace width, separation and dielectric permittivity? Without using dielectric height (H) since no plane here.
- Comments(1)
A****min
Jul 09.2019, 17:31:58
if nothing else, you can construct the geometry and simulate it with something like ATLC2.
On a practical note, if the application is only 10/100Mb, that can literally run over coathangers. It's very tolerant to mismatch, and running traces that are good-enough will more than suffice, particularly if they are short. Traces of only a few cm or less will probably be fine at Gb too.
