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A****min
Jul 04.2019, 16:38:20
Use two vias, one for each capacitor (assuming these are capacitors). They can still be linked, pad to pad. This reduces the stray inductance. You can even use three (one inbetween), or more.
Avoid sharp corners. Acid trapping is a thing of the distant past, but it doesn't look good. Avoid long distances on bypass traces.
You can also fill GND on top and bottom, stitching with vias frequently, to emulate an inner ground plane layer.
Also avoid pad entry imbalance. That is, don't have a huge blob of connecting copper on one pad, and a teensy trace on the other. Example might be a 10 mil trace to a pull-up resistor, the other pad having a big fat 20 mil VDD trace running through it. The 20 mil trace enters and exits, for a total perimeter of 40 mils, so the pad balance ratio is 4:1. 2:1 is normally recommended.
Pad imbalance is a bigger issue for 0603 and smaller parts, where tombstoning during reflow is likely.
Lengthwise and diagonal (corner) pad entry is also recommended for the same reason. Or if you have side entry, make it balanced. This helps prevent twisting of the part during reflow.