日本語
I've been working on this board layout and would like some critique and feedback. If it sucks, tell me how much and what I should be doing instead! 
I don't have a great deal of experience laying out boards and this is my first 'proper' complicated layout - everything I've done before has been fairly trivial and much simpler than this.
The line down the middle is where the board is intended to be split, so I end up with two boards that will be stacked (with component sides facing). By the way, ignore the grey traces between the 14-way headers in the middle, I had to put jumper links there to satisfy the ERC - they will actually be a ribbon cable when assembled. Might have it v-groove cut at time of manufacture, or maybe leave it whole and cut it myself - depends on cost (I know many PCB makers want to charge you extra for 'multiple' designs, which this isn't really, but who knows what they'll say). I would have made it a routed slot with break-away joins, but that would make the whole thing >100mm wide, which unfortunately puts you into a higher pricing bracket for a lot of PCB manufacturers.
- Comments(1)
A****min
Aug 01.2019, 17:28:15
Any particular reason why you couldn't move the Q1 chip more to the left? It looks like you could potentially route that thick voltage behind that first row of pins on the DIP chip and avoid going on the other side of the board with the K1, K2, K3 and K4 buttons (or whatever those are)
Moving it to the left may also give you more room to arrange those 3 resistors that are now between q1 and the header so you don't have to wiggle those traces that much
You could also potentially route those tiny traces so they won't go under the IC and to vias but rather go above the row of pins in the DIP chip and just change the order of the wires in the header (if it's not critical to be in that order)
That U5 ... it just feels like there's a lot of space wasted by placing it vertically .. and i don't really like that thick trace going from the header under those VO parts and then down all the way to that C3 and into the chip. It it wasn't for those three thin traces going all the length of the chip down and then to the ICSP header, you could have routed that thick trace under the chip and then come out directly to that header around those VOx parts.
