Cadence TimingVision supports high-speed PCB interface design

Current Events Cadence TimingVision supports high-speed PCB interface design

1122 1 Mar 28.2014, 13:07:00

Cadence has announced a new TimingVision technology within the Allegro PCB Designer solution that can speed the timing closure of high-speed PCB interfaces -- such as a DDR3 memory interface -- by 60% or more. The new product is particularly well suited for PCBs with advanced high-speed interfaces.

Key features:

•Dynamic feedback on the active and related signals during edits on the design canvas
•Auto-interactive Phase Tuning (AiPT), to compensate both static and dynamic phase constraints on a selected set of differential pairs
•Auto-interactive Delay Tuning (AiDT), to compensate for propagation delay, relative propagation delay and total etch length constraints specified in the physical design on a selected set of signals such as a byte lane.

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