PCBgogo

Electronic Project Engineer's Best Partner!
PCB impedance control
1563 0 Dec 13.2013, 13:58:00

Keyword: PCB conductor, PCB wire, PCB trace, PCB line, PCB process

In recent years, with the improvement of IC integration and application of the signal transmission frequency and speed is higher and higher, consequently in PCB conductor, signal transmission (emission) after high to a certain value, will be affected by PCB wire itself, leading to a serious distortion or complete loss of signal transmission. This shows that the PCB traces "flow" by the "thing" is not current, but the square wave signals, or pulses on the energy transmission. This happens when the "signal transmission" the above resistance, also known as "impedance", on behalf of the symbol for Z0. So, PCB traces on the single solution to "tong", "broken" and "short circuit" problem is not enough, but also control the impedance of the conductor.

A. What is the impedance?

Impedance is a parameter used to evaluate the properties of electronic components. Impedance is defined as components under the given

frequency of alternating current (ac) always fight.

B. Why the impedance control?

Because the PCB line of characteristic impedance value must match the Driver and Reciver electrical impedance, reflection, otherwise it will

cause the signal energy attenuation, and the delay of the signal arrival time, serious when can't sentenced to alone and boot. Circuit of signal

transmission, the influencing factors of its' characteristic impedance circuitry of the cross-sectional area, the thickness of the insulating material

between line and ground plane, and the dielectric constant of the three items. Affect the impedance for most parts: 1, line width, thickness of 2,

pp, 3, dielectric value (FR - 4 = 4.3) followed by the weld thickness, lateral erosion, copper thick. Etc. These will change the lines of magnetic

force distribution, therefore group of variable resistance, group to understand the requirement of tolerance values, to push the process the

biggest tolerance value, in terms of software can achieve. PCB process control key for use on the material/wire diameter tolerance within 10%

after pressing interlayer thickness accurate within 10%, can meet the design requirements.

C.What is the Er value?

Dielectric constant or relative permittivity is usually per unit volume of each unit under the potential gradient of insulation material in the

electrostatic energy can be stored. Dielectric constant of a lot of the signal transmission is stored in the plate caused by poor signal and

transmission speed slow down. General for the signal quality request the most high will limit PTF (eph dragon (iron)) because of its Er = 2.. 5.

D.General impedance in three categories:

1. The characteristic impedance (impedance).

Such as customer for 4 layer board, outer line width of the impedance control, the calculation for the outer line width impedance software patterns

are as follows.

The impedance of the design is as follows:

Such as customer for 6 layer board, its 1,3,4,6 layer to go line, all must control the impedance of line width, pay attention to the inner of L3 and L4 impedance line width must not overlap, measures to avoid affect the impedance value of the test, the calculation for the inner line width impedance software patterns are as follows.

The impedance of the design is as follows:

Such as customer for 6 layer board, its 1,3,6 layer to go line, all must control the impedance of line width, the impedance of the design is as follows:

Such as customer for 4 layer board, the inner layer (2, 3) line width of the impedance control, pay attention to impedance line width corresponding to the up and down layer is laying copper foil and the impedance of the L2 and L3 line width design must not overlap, measures to avoid affect the impedance value of the test, the impedance of the design is as follows:

Customers make the inner impedance, need to pay attention to the requirements of the group of line width, corresponding to the up and down if there is a covered with copper foil layer or not covered copper foil, top and bottom is covered with copper foil, its computation software same as above, if is not covered with a layer of copper foil, another layer is covered on the copper foil, the impedance calculation software patterns are as follows.

The impedance of the design is as follows:

Such as customer for 4 layer board, outer & inner line width of the impedance control, pay attention to the impedance of the inner line width must not overlap design measures, to avoid affect the impedance value of the test, the impedance of the design is as follows:

2. differential impedance

Customer for the 4 layer board, the line width of the outer/spacing/line width of the impedance control, its computation impedance line width/spacing/line width impedance of software model is as follows.

The impedance of the design is as follows:

Such as customer for 6 layer board, its 1,3,4,6 layer to go line, all must control the impedance of line width, the calculation for the inner line width impedance software patterns are as follows.

The impedance of the design is as follows:

3.RANBUS impedance

Clients on 4 layers the outer line width/span control the impedance line width, the calculation for the outer RANBUS impedance software patterns are as follows.

The impedance of the design is as follows:

Clients on 6 layers of,3,4,6 (1) a line width/span impedance line width control, need to pay attention to the inner impedance line width must, measures do not overlap, to avoid affect the impedance value of the test, its inner RANBUS impedance calculation software patterns are as follows.

The impedance of the design is as follows:

E. coupon design considerations:

1. The general design of impedance has design layer (layer lines), and the reference ground plane (layer), such as customer specification limits,

the specification of 4 layer board for L1 layer (design) - L2 formation (layer)] [L2, L3 [L3 ground layer (layer) - L4 (design).

2. The inner impedance control should pay attention to, such as continuous layer 2 cable width control, no other layer don't [ground layer copper

foil layer (corresponding)], the line width of the design must, measures do not overlap, to avoid affect the impedance values of the test.

3. General outer impedance line width should be copper bar protection, the copper strip width as wide as possible ", "spacing needs more than

10 mil min.

4. The inner line layer, there are impedance control needs to pay attention to the ground plane (layer), is there a copper foil cover, the impedance

calculation software and the impedance of the design are different.

Source: http://www.seekic.com

Prev: PCB process defect causes and elimination process - the film
Next:PCB manufacturing defects causes and elimination method - drilling
  • Comments(0)
Upload a photo:You can only upload 1 files in total. Each file cannot exceed 2MB.Supports JPG, JPEG, GIF, PNG, BMP
Browse
Submit