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Traces on the PCB can be modeled as capacitors, resistors and inductors in series and parallel structures. Typical values for the series resistance 0.25-0.55 ohms / foot, as the insulating layer because of the parallel resistor is usually high. After the parasitic resistance, capacitance and inductance added to the actual PCB connection, the connection is called a final impedance characteristic impedance Zo. The wider diameter, from the power / ground closer, or the higher the dielectric constant of the insulating layer, the smaller the characteristic impedance. If the impedance of the transmission line and the receiver do not match, then the output current signal and the signal of different final stable state, this causes the signal at the receiving end of reflection, the reflected signal will return the signal transmitter and reflected back again. With the weakening of the amplitude of the reflected signal energy will decrease, until the voltage and current signal to stabilize. This effect is called oscillation, the oscillation signal at the rising and falling signals can often be seen.

Transmission line model based on the above definition, summed up the entire PCB transmission line circuit design will bring the following effects:

· Reflected signals reflected signal

· Delay and timing errors Delay & Timing errors

· Repeatedly across the logic level threshold error False Switching

· Overshoot and undershoot Overshoot / Undershoot

· Crosstalk Induced Noise (or crosstalk)

· EMI radiation of electromagnetic radiation

1 reflected signal

If a trace is not properly terminated (termination), the pulse signal from the drive end is reflected at the receiving end does not lead to the desired effect on the distortion of the signal profile. When distorted very significant errors can lead to a variety of causes PCB design failure. Meanwhile, the distorted signal is increased sensitivity to noise, will cause failure of the PCB design. If the above is not sufficient to consider the case, EMI will be significantly increased, which is not merely affect their PCB design results also cause failure of the whole system.

Mainly due to the reflection signal is generated: long traces; not match the end of the transmission line, excessive capacitance or inductance and impedance mismatch.

2 delay and timing errors

And timing error signal delay as follows: a period of time the signal transition in the signal does not change the logic level between the high and low thresholds. Excessive signal delay timing errors may lead to confusion and device functions.