日本語
Hey guys,
I am working on an office project where we are using multiple SPI ICs on a single bus and as the orientation and pins of the IC is fixed I had to route the bus in the manner shown in the image. I am tapping these signal where there is an IC connected as shown in the image. The bus spans 310 mm long where the signals from the controller are inserted in the middle. SPI clock will be at <10MHz. the board is two-sided and has a ground flood fill in between them.
Sorry I cannot share the whole layout as its an office project.
1. I am concerned that the clock line going over the other lines may cause a problem, what are your views on that?
2. Is there anything else I need to take care about considering the length of the bus? i.e. 310mm/2 = 155mm on either side
Thank you
- Comments(1)
A****min
Aug 21.2019, 09:29:43
Stubs this short are only a concern with high speed interfaces, not SPI.
The angled bits could stand to go, they just look ugly (some will call the acute angles acid traps, but that apparently isn't a problem anymore; so I stick with an aesthetic reason instead).
Add stitching vias around the bus.
If you want, add source termination resistors, at each driving pin (so, at master SCK, MOSI and CS's, and at slave MISO's). 47 ohms would be typical, or higher if you don't need super fast operation.
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